Keynotes
Prof. Dr. Luca Benini, ETH Zürich
Designing Reliable and Efficient Integrated Systems for Embodied AI - An Open Platform Approach
Autonomous systems, such as robots, cars and satellites, are now AI-first
designs, and require sustained energy efficiency improvements in the
design of their control and intelligence functions. Efficiency is
not the only key constraint, as safety and long-term reliability are
extremely critical for autonomous operation. To tackle the compound
challenge, we need to aggressively optimize efficiency, leveraging
specialization across all levels of the design hierarchy, pushing into
domain-specific design automation tools and methodologies, while at
the same time accounting for the increasing reliability concerns in
advanced integrated-circuits technologies. In this talk, Luca Benini
will give concrete examples of deep domain specialization, for
efficient and safe, reliable operation, emphasizing the strategic
importance of an end-to-end open-platform approach.
Biography
Prof. Dr. Luca Benini holds the chair of digital Circuits and systems at ETHZ and is Full Professor at the Università di Bologna. He received a PhD from Stanford University. His research interests are in energy-efficient parallel computing systems, smart sensing micro- systems and machine learning hardware. He is a Fellow of the IEEE, of the ACM, a member of the Academia Europaea and of the Italian Academy of Engineering and Technology.
Janusz Rajski, Vice President of Engineering at Siemens EDA
Beyond Conventional DFT: New Paradigms for Silicon Reliability in the AI Era
The explosive growth of large-scale data centers supporting AI
computing amplifies the old DFT problems known in automotive
electronics and creates new challenges that require new
solutions. Heterogeneous integration combined with the latest
technology nodes results in design complexities presenting
fundamental reliability challenges in data centers and other
safety- and mission-critical applications. It is universally agreed
that reliable operation of these complex systems throughout their
entire lifecycle is the greatest challenge facing the semiconductor
industry today.
Although DFT is an established area, many of its traditional solutions
are no longer adequate to satisfy the new reliability requirement.
The Silent Data Corruption Error (SDCE) problem, reported by many
operators of large data centers, demonstrates that the quality of
manufacturing test and monitoring during the silicon lifecycle is not
satisfactory. How can we improve the effectiveness of manufacturing
screening and reduce test escapes? What new fault models and test
methodologies are needed to address the SDCE problem? Can stress
testing help reduce early life failures? What should be done to ensure
reliable operation of silicon during its entire lifecycle? What new DFT
architecture is needed to handle designs with thousands of cores,
facilitate bring up and debug?
Biography
During his tenure at Mentor Graphics and Siemens, Janusz built a strong R&D organization focused on innovative DFT and SLM technologies. Key developments include TestKompress, Cell-Aware Test, and Streaming Scan Network. He has published over 280 IEEE research papers and holds 130 US and international patents. A Lifetime Fellow of the IEEE, he earned a Ph.D. in electrical engineering and an honorary doctorate from Poznań University of Technology. In 2003, Poland's President awarded him the title of "Professor of Science." His honors include the Stephen Swerling Innovation Award (2009, Mentor Graphics) for TestKompress and revitalizing their DFT business, the Siemens Inventor of the Year Lifetime Achievement Award (2018) for DFT innovations, the Siemens Inventor of the Year Award (2022) for co-inventing Streaming Scan Network, and the Bob Madge Innovation Award (2023).
Dr. Yervant Zorian, Chief Architect and Fellow at Synopsys
Biography
Dr. Yervant Zorian is Chief Architect and Fellow at Synopsys and President of Synopsys Armenia, with previous leadership roles at Virage Logic, LogicVision, and AT&T Bell Laboratories. He currently leads the IEEE Test Technology Technical Council, founded the IEEE 1500 Standardization Working Group, and serves as an adjunct professor at the University of British Columbia. A prolific researcher and innovator, Dr. Zorian holds 35 US patents, has authored four books, and published over 350 refereed papers, earning numerous best paper awards and recognition as an IEEE Fellow since 1999. His accolades include the 2005 Industrial Pioneer Award for contributions to BIST, the 2006 IEEE Hans Karlsson Award for diplomacy, the IEEE Distinguished Services Award, the IEEE Meritorious Award for EDA contributions, and Armenia's 2014 National Medal of Science. He earned an MS in Computer Engineering from USC, a PhD in Electrical Engineering from McGill University, and an MBA from Wharton.